1. Field of the Invention
This invention relates to architecture for a high-speed digital computer system and, more particularly, to circuitry used therein to enhance operating speed and efficiency of such a system.
2. Description of Prior Art
Basic elements of a digital computer include a processor, for processing machine language digital data, and a memory. In general, machine language instructions for controlling processing operations of the processor are stored in memory. Memory may also contain at least portions of data to be processed. Instructions and data are transmitted between processor and memory by memory input and output busses. A computer further includes input/output (I/O) apparatus for transmitting instructions and data between computer and external devices. External devices may include, e.g., a control console or a tape storage unit, and generally do not communicate in computer machine language.
Capability of such a digital computer is defined, and limited, by its speed and efficiency in processing data and its adaptability to changing user requirements. Computer system speed and efficiency are determined by several factors. Among these factors are operating speed of memory, availability of memory access by the processor when required. Other factors are data band width which may be supported by memory input and output busses, complexity of processor interface with memory input and output busses, availability of instructions to the processor when required, and speed with which the processor initiates and executes sequences of instructions.
A limitation on computer adaptability is its ability to structure memory capacity according to user needs. Another limitation is ability of computer I/O apparatus to adapt to a variety of external devices, or to changes in computer internal machine language.
The present invention provies computer system improvements which bear upon the above-noted speed/efficiency factors, thus improving the speed and efficiency of operation of the system, and also provides solution to the aforementioned problems and limitations of the prior art as will be discussed in detail hereinbelow.